Precision monolithic timing circuits capable of producing accurate time delays or oscillation
The time-delay or monostable mode of operation the timed interval is controlled by a single external resistor and capacitor network.
The astable mode of operation the frequency and duty cycle may be independently controlled with two external resistors and a single external capacitor.
The threshold and trigger levels are normally two-thirds and one-third respectively of VCC.
These levels can be altered by use of the control voltage terminal.